The natural count sequence is to run through all possible combinations of the bit patterns before repeating itself.
External logic is used to cause the counter to terminate at a specific count. A decade counter counts from 0 to 9,
thus making it suitable for human interface. A MOD 12 truncated ripple counter is used for clocks.
Clear flip flops!
A dot in the schematic indicates a connection between two crossing wires. For this schematic the black dot is a
fixed connection and the red connector dot can be moved.
The default connection is a MOD 10 truncated ripple counter. The inputs to the NAND gate are Q3 and Q1.
The JK flip flops are configured to toggle as the J and K inputs are 1. This flip flop has a falling edge clock.
Click on CLK switch and observe the changes in the outputs of the flip flops. The CLK switch is a momentary
switch (similar to a door bell switch - normally off).
This counter counts up from 0000. Normally the output of the NAND gate is 1. When the count reaches 1010
(decimal 10), the NAND gate outputs a 0 which clears the flip flops to 0000. In real operation, this state is
only momentary (a glitch), time enough to clear the flip flops. You can disable the alert to observe what would
happen if you had physically connected the circuit. This circuit has the same configuration as the 74LS93 4 bit
Move the red connector dot to change the wiring connection and the MOD. Observe the relationship between the MOD
and the connection. Hint - put a 1 in the binary position where there is a connection - eg if the NAND gate is
connected to Q3 and Q0, the MOD is binary 1001 (decimal 9)
Move the red connector dot to GND. The NAND gate always output a 1. Thus the counter reaches the full count and
is a MOD 16 counter (24)
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